Computing Switch On-Resistance Of A NMOS Switch

** Circuit Description **
* Input signal
Vi 2 0 DC 0V
* Substrate Bias
Vss 3 0 DC -5V
* Control Signal
Vphi 1 0 DC +5V 
* Switch: NMOS Transistor
M1 2 1 0 3 nmos_enhancement_mosfet L=100u W=100u
* mosfet model statement (by default, level 1)
.model nmos_enhancement_mosfet nmos (kp=0.25m Vto=+1.0V lambda=0.02 gamma=0.9)
** Analysis Requests **
* sweep the input voltage from Vss to Vdd (skip over 0,0 point)
.DC Vi -5V +5V 10.01mV
** Output Requests **
.PLOT DC I(Vi) V(2)
.Probe
.end